The effort in rapid performance improvement regarding the speed and the sensitivity of data acquisition system in capacitance tomography is still happening. phase detection is one of the key issues and the most important features in data acquisition system for electrical capacitance volume tomography. Imamul Muttakin and others of CTECH Labs Edwar Technology have proposed the core processing for calculating phase and amplitude of the detected signal at EECSI 2014 (Electrical Engineering, Computer Science & Informatics Conference). The paper won the best paper award for electronics category.
IAES (Institute of Advanced Engineering & Science) Indonesia Section and several Indonesian and Malaysian Universities (Undip, Unsri, UGM, UAD, UTEM) organized the conference on 20-21 August 2014 in Yogyakarta, Indonesia. This event was intended to provide technical forum and research discussion related to electrical, electronics, instrumentation, control & telecommunication engineering, computer science and informatics. The Conference is aimed to bring researchers, academicians, scientists, students, engineers and practitioners together to participate and present their latest research finding, developments and applications related to the various aspects.
Prof.Daniel Thalman of EPFL Switzerland, presented a keynote speech at the conference titled ‘Populating 3d Cities: a True Challenge’. Meanwhile, his wife, Prof. Nadia Magnenat Thalman of university of Geneva also presented a keynote speech titled ‘assistive social robots for people with special needs’
The excellent selected papers will be published in Impact Factor (SCI-E ISI Thomson), SCOPUS, or EI Compendex journals, as appropriate after extension and modification. Other Authors of presented papers also will be invited to submit extended versions to a IAES Journals (SCOPUS, EI Compendex and/or INSPEC indexed journals). JFI, the INSPEC indexed journals will be available on Engineering Village, EBSCO, Thomson Reuters Web of Knowledge platforms through INSPEC database.
ECVT is a volumetric (real-time 3D) tomography technique based on capacitance measurement which has replaced classical system in two-dimensional slicing for tomography imaging. Data acquisition system collects data obtained from sensor to be formed and sent to computer which manipulates the data pattern into image using specific algorithm. in the presented study, Core processing for calculating phase and amplitude of the detected signal was designed on FPGA platform. The optimum system design, adjusted to 16-bit data resolution and clock speed 100MHz, gives phase detection range 0-114.58° (or ±57.29°) and mean absolute error 0.58°. Data processing rate solely at digital signal stage is approximately 1785data/s (for 8-channel), 416data/s (for 16-channel), and 100data/s (for 32-channel).